EdgeQ reveals more details behind its next-gen 5G/AI chip

Danny Crichton
·3-min read

5G is the current revolution in wireless technology, and every chip company old and new is trying to burrow their way into this ultra-competitive — but extremely lucrative — market. One of the most interesting new players in the space is EdgeQ, a startup with a strong technical pedigree via Qualcomm that we covered last year after it raised a nearly $40 million Series A.

The company has been quite stealthy about its technology as it works on its design (its website as I write this literally says “Welcome to WordPress. This is your first post. Edit or delete it, then start writing!”), but today, the company revealed more details for the first time (and also updated their website).

The most interesting facet of its system-on-a-chip (SoC) design is that it is based on RISC-V. Unlike processor architectures like x86 and Arm, RISC-V is open-source, and one of the first open architectures to reach any sort of enduring popularity and ecosystem. That’s led to a bunch of new companies building on top of it, including now EdgeQ and also SiFive, which we covered late last year.

Vinay Ravuri, EdgeQ’s founder and CEO, explained that the use of RISC-V allows EdgeQ to offer chips with the flexibility of reprogrammable processors known as FPGAs while also offering a more cohesive and integrated product with better power savings. In his view, that’s been one of the big challenges in the wireless communications market to date with the rollout of 5G.

“When you are in a closed system, it compacts nicely, and everything matches,” he said, pointing to market leaders like Huawei and Ericsson whose vertically-integrated base stations are widely deployed throughout the world. The problem is that customers feel stifled by having all of their equipment come from one, irreplaceable vendor. Meanwhile, with a purely open system based on standards like OpenRAN, “you get a clunky solution” that’s cobbled together from off-the-shelf parts. That leads to increased power consumption since the components in these boxes were never faithfully designed to be used together.

Ravuri says that EdgeQ stands in the middle between open and closed, offering an extensible system that is also integrated and may save, in some instances, up to 50% of the power demand for a wireless base station. The key is combining machine learning into wireless communications through a better SoC and having all the parts work seamlessly together. “The uniqueness of the communications chips is in the algorithms,” he said. “You are not selling sand, you are not connecting gates and saying this is a processor. You are connecting gates and here is an algorithm for the physical layer of communications.”

EdgeQ founder and CEO Vinay Ravuri. Photo via EdgeQ.

Adil Kidwai, who is VP and head of product at EdgeQ, said that “Under the hood, it is hardware instructions that are controlled by software … It’s a ‘soft’ modem with very low power consumption.” Since EdgeQ is based on RISC-V, the existing toolchain available in that ecosystem also applies to the company’s product, allowing engineers to use compilers and debuggers that have been built for RISC-V. Ravuri noted that EdgeQ has added about 50 to 100 of its own vector extensions to the base RISC-V implementation to optimize performance.

With the product’s design more firmly established, he said that the company is looking to sample its system with customers in the first half of this year. “Once we sample, there is a productization cycle that customers take,” he said, and he intends to be starting revenue growth by 2022. The EdgeQ base station is compatible according to the company with OpenRAN option 7.x and option 6.

The company also noted for the first time today that Paul Jacobs, the former CEO of Qualcomm, and Matt Grob, the company’s former CTO, have both joined EdgeQ’s advisory board in an official capacity. The two met Ravuri back when he was at Qualcomm and have been in touch throughout EdgeQ’s development.